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  48. Testing your Design on FPGAOL
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  71. <h1>
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  73. <a href=".." >Developing FPGA Projects</a>
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  81. <h2 id="developing-fpga-projects">Developing FPGA Projects</h2>
  82. <p>Developing FPGA projects for FPGAOL is very same as usual. You only need to take care of selecting chip and pin specification.</p>
  83. <p>If you are not familiar with developing FPGA project on Vivado, please refer to Vivado tutorial.</p>
  84. <p>We strongly recommand you to use our example projects and constraint file.</p>
  85. <h3 id="select-fpga-chip">select FPGA chip</h3>
  86. <p>Please select <strong>xc7a100tcsg324-1</strong>. Other chips won&apos;t work on FPGAOL.</p>
  87. <p><img src="img/board.png" alt="board"></p>
  88. <h3 id="human-interface-pin-specification">Human Interface Pin specification</h3>
  89. <p>Correspondence between LEDs &amp; SWs and FPGA pins&#xFF1A;</p>
  90. <table>
  91. <thead>
  92. <tr>
  93. <th>LED0</th>
  94. <th>LED1</th>
  95. <th>LED2</th>
  96. <th>LED3</th>
  97. <th>LED4</th>
  98. <th>LED5</th>
  99. <th>LED6</th>
  100. <th>LED7</th>
  101. </tr>
  102. </thead>
  103. <tbody>
  104. <tr>
  105. <td>JC1</td>
  106. <td>JC2</td>
  107. <td>JC3</td>
  108. <td>JC4</td>
  109. <td>JC7</td>
  110. <td>JC8</td>
  111. <td>JC9</td>
  112. <td>JC10</td>
  113. </tr>
  114. </tbody>
  115. </table>
  116. <table>
  117. <thead>
  118. <tr>
  119. <th>SW0</th>
  120. <th>SW1</th>
  121. <th>SW2</th>
  122. <th>SW3</th>
  123. <th>SW4</th>
  124. <th>SW5</th>
  125. <th>SW6</th>
  126. <th>SW7</th>
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  131. <td>JD1</td>
  132. <td>JD2</td>
  133. <td>JD3</td>
  134. <td>JD4</td>
  135. <td>JD7</td>
  136. <td>JD8</td>
  137. <td>JD9</td>
  138. <td>JD10</td>
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  142. <h3 id="other-resource-on-board">Other Resource on Board</h3>
  143. <ul>
  144. <li>100MHz clock: E3</li>
  145. </ul>
  146. <p>You can also use an existing constraint file.</p>
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